With the progress in miniaturization of electronic equipment (e.g. credit cards with integrated circuits and cellular phones), the demand is growing rapidly for ultra thin integrated circuits. Since the active part of an electronic chip consists of several layers with a total thickness of several ten micrometers on the surface of a wafer with a thickness of 700 µm, it is possible to get thin components by thinning the wafer backside. The demand for these ultra thin components is growing incredibly fast.

Integrated circuits are built in layers on the wafer frontside (with the necessity to remove layers from the wafer backside from time to time by use of a wafer backside etcher). The wafer with the finished integrated circuits has a thickness of 700 µm, of which 500 - 600 µm have to be removed. This can be done by mechanical grinding followed by an etch step for damage removal.

One problem is the mechanical grinder. It gets very difficult to grind wafers to a thickness below 150 µm. Wafer breakage will become a major problem. Another problem is the etch step afterwards for damage removal and further reduction of thickness down to 125 µm or even 100 µm. Conventional dry etch processes with their etch rate of £ 1 µm/min are too slow, the only wet etch equipment for this purpose is a spin etcher with all the possible problems involved in handling of these thin wafers.

Secon has been approached by the chip industry to develop an equipment for wafer thinning by CDE (Chemical Dry Etch) technology on the basis of the Secon Radical Generator. All attempts by other equipment manufacturers failed up to now due to the low etch rate and therefore, the long time it takes to reduce the wafer thickness down to required 50 - 100 µm. The Secon radical generator put Secon into a position to develop the SLIM tool for wafer thinning by use of a combined CDE / RIE / UV (Chemical Dry Etch / Reactive Ion Etch / Ultra Violet) process.

Key Benefits

• Etch Rate for silicon wafers (150.... 200mm) > 25 µm/min, thus high throughput
• Homogeneity of etch rate (wafer thickness) ± 2% typically, ± 5% guaranteed
• Surface quality is adjustable from as polished to velvet-like
• Wafer bow and warpage improvement after dry etching
• Die breaking strength improvement after damage removal and stress relief
• Wafer edges: soft edge rounding avoids wafer breakage caused by sharp wafer edges
• Wafer temperature typically < 100 °C, guaranteed < 120 °C
• Wafer handling: wafer fixed in defined position
• Low energy and gas consumption
• Lower cost of ownership (< USD 2.00/wafer)

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Last modified: Oktober 28, 2004